PACTPost-route Agentic Checkpoint Tuning for FPGA Timing Closure
Huan Lin*, Kunlong Li*, Lingli Wang, Zhiang Wang
College of Integrated Circuits and Micro-Nano Electronics, Fudan University, Shanghai.*Equal contribution.
An implemented FPGA design often still has timing margin left in it. PACT lets an LLM read the evidence in a routed Vivado checkpoint, pick one local repair, and keep the result only when it is route-legal and faster.
The problem
Late-stage timing closure starts from a routed design checkpoint (DCP): netlist, placement, routing and constraints, with the remaining violations visible in the timing report. An engineering change order (ECO) edits that state locally instead of rerunning the full flow.
Automating this is hard. Every edit has to improve setup timing without breaking routing legality, hold or pulse-width constraints, checkpoint replayability or functional equivalence. The useful repairs are fine-grained and specific to each design, so flow tuners that search over global directives and seeds cannot express them, and a free-form coding agent spends most of its budget planning individual tool calls.
How one trial works
PACT treats tuning as a series of validation-gated moves between an accepted checkpoint and a candidate. At startup it copies the routed input tocurrent_best.dcp. Each trial then runs the same five steps.
Read the checkpoint
Timing reports and RapidWright queries give sampled setup paths, logic and route delay, high-fanout nets, placement spread and routed detours.
Choose one repair
The LLM sees that evidence, the eligible skills and the outcome of every earlier trial, then names an action, a target and its parameters. Auto targeting resolves the exact cell, net or pin.
Run it on a copy
The skill edits a separate candidate DCP, reroutes it and runs physical optimization. The accepted checkpoint is never touched.
Validate under the original constraints
The candidate must reopen, be fully routed with zero routing errors, and pass hold, pulse-width, minimum-period and design-consistency checks.
Accept or roll back, then record
A clean improvement becomes current_best.dcp. Anything else is discarded. Every trial is logged with its action, target, parameters and ΔWNS, and combinations that gave too little gain are not retried on that design.
The tools are exposed through two MCP servers. VivadoMCP extracts timing profiles and controls routing, physical optimization, pblocks and clocks. RapidWrightMCP inspects cell, net and pin connectivity and runs object-level ECO routines.
Eighteen actions
Nine families in PACT v1.0.4: five kinds of local ECO, three full-design searches and one for control and probing. On average PACT applied 2.6 checkpoint-changing actions per design.
Net, cell and LUT edits
- fanout_opt
- Copy a driver and split its sinks
- force_replicate
- Force Vivado driver replication
- per_net_unroute
- Unroute and repair a named net
- critical_net_reroute
- Reroute a critical net window
- cell_replace
- Move a cell beside a route detour
- endpoint_bel_move
- Move an FF to its paired FF2 BEL
- path_local_lut_reflow
- Re-place critical-path LUTs
- lut_merge
- Collapse a compatible LUT cone
- lut_pin_swap
- Remap a critical LUT input pin
Regions, implementation and control
- pblock
- Constrain cells to a fabric region
- pblock_sweep
- Compare candidate pblock regions
- critical_cluster_anchor
- Anchor critical cells in a soft pblock
- phys_opt
- Apply a physical optimization directive
- post_route_cleanup
- Try route and physical-opt recipes
- fresh_place_route
- Re-place and reroute the current DCP
- clock_tighten
- Tighten the clock during search
- checkpoint_import
- Check a DCP for possible adoption
- custom
- Call a backend tool during deep analysis
Results
35 post-route checkpoints on xcvu3p-ffvc1517-2-e: 27 used during development and 8 held out. Vivado and RapidWright 2025.1, GPT-5.5, 8 cores and 32 GB. PACT and Codex get one hour per design; DATuner runs uncapped.
- Geometric-mean Fmax gain
- +22.30%
- DATuner +15.14%, Codex Agent +9.78%
- Faster than DATuner
- 6.4×
- paired geometric mean of runtime
- Model cost per design
- $0.16
- Codex Agent $3.81, 24.5× more
PACT is best or tied-best on 27 of the 35 designs. The gains are largest where margin is recoverable: BOOM SoC goes from 48.2 to 91.9 MHz, the three CORDIC designs gain more than 60%, and TCAM goes from 561.8 to 831.9 MHz. On congestion-bound designs such as Vortex Xbar Large, PACT keeps the original checkpoint rather than accept an unsafe edit.
Classic, compact and HLS-style
- VexRiscv+49.5%
- TCAM+48.1%
- LogicNets+33.7%
- Mini-ISP+31.5%
- Rosetta Digit+16.5%
- VTR MCML+13.8%
- AES+11.2%
- OpenRISC †+8.6%
- Rosetta 3DR+6.9%
- Rosetta OptFlow+5.3%
- Rosetta Spam+1.8%
Compute-intensive datapaths
- CORDIC-M+71.3%
- CORDIC-L+66.8%
- CORDIC-S+62.2%
- DC FFT-S+53.2%
- RaygenTop+36.2%
- DC FFT-L+32.9%
- DC FFT-M+30.1%
- FINN RadioML+12.9%
- NVDLA Basic+9.6%
- NVDLA Large †+8.7%
- NVDLA XL+4.5%
- FSA Systolic+2.7%
System-level and generated backend designs
- BOOM SoC+90.7%
- ISPD16 Ex2+49.1%
- CoreScore-500+27.0%
- Vortex Basic+20.1%
- Congestion XL †+12.3%
- SoC-L †+8.4%
- FPL26 Self-built+8.4%
- FFT-CORDIC-M+7.4%
- AXIS Fabric-Hard †+3.5%
- FFT-CORDIC-L †+3.1%
- AXIS Fabric †+1.7%
- Vortex Large †+0.0%
Fmax gain over the original routed checkpoint, under the original constraints
Show all 35 results as a table
| Design | Original (MHz) | PACT | DATuner | Codex |
|---|---|---|---|---|
| VexRiscv | 310.2 | +49.5% | +26.0% | +39.4% |
| TCAM | 561.8 | +48.1% | +27.3% | +28.6% |
| LogicNets | 403.6 | +33.7% | +16.3% | +11.9% |
| Mini-ISP | 307.1 | +31.5% | +32.1% | +32.6% |
| Rosetta Digit | 367.0 | +16.5% | +11.7% | +2.2% |
| VTR MCML | 62.2 | +13.8% | +8.2% | +7.1% |
| AES | 334.0 | +11.2% | +11.2% | +1.7% |
| OpenRISC † | 209.0 | +8.6% | +7.6% | +3.8% |
| Rosetta 3DR | 270.9 | +6.9% | +3.8% | +3.3% |
| Rosetta OptFlow | 324.9 | +5.3% | +6.4% | +2.3% |
| Rosetta Spam | 437.4 | +1.8% | +1.8% | +0.0% |
| CORDIC-M | 473.7 | +71.3% | +53.3% | +38.0% |
| CORDIC-L | 456.6 | +66.8% | +44.9% | +69.6% |
| CORDIC-S | 682.1 | +62.2% | +51.1% | +41.8% |
| DC FFT-S | 477.1 | +53.2% | +40.1% | +11.0% |
| RaygenTop | 451.3 | +36.2% | +28.2% | +29.4% |
| DC FFT-L | 442.5 | +32.9% | +25.3% | +13.5% |
| DC FFT-M | 456.4 | +30.1% | +26.5% | +25.5% |
| FINN RadioML | 284.9 | +12.9% | +0.0% | +6.4% |
| NVDLA Basic | 189.9 | +9.6% | +9.6% | +1.2% |
| NVDLA Large † | 158.1 | +8.7% | +2.4% | +0.0% |
| NVDLA XL | 152.5 | +4.5% | +4.5% | +0.8% |
| FSA Systolic | 82.8 | +2.7% | +5.7% | +0.0% |
| BOOM SoC | 48.2 | +90.7% | +29.5% | +0.1% |
| ISPD16 Ex2 | 107.6 | +49.1% | +0.0% | +0.0% |
| CoreScore-500 | 344.2 | +27.0% | +22.3% | +0.7% |
| Vortex Basic | 210.5 | +20.1% | +20.1% | +1.1% |
| Congestion XL † | 305.2 | +12.3% | +12.3% | +0.0% |
| SoC-L † | 326.9 | +8.4% | +8.4% | +0.0% |
| FPL26 Self-built | 235.0 | +8.4% | +8.4% | +6.4% |
| FFT-CORDIC-M | 343.9 | +7.4% | +7.4% | +1.2% |
| AXIS Fabric-Hard † | 140.0 | +3.5% | +3.5% | +0.0% |
| FFT-CORDIC-L † | 338.4 | +3.1% | +3.1% | +0.0% |
| AXIS Fabric † | 179.1 | +1.7% | +1.7% | +0.0% |
| Vortex Large † | 146.8 | +0.0% | +0.0% | +0.0% |
Where the gain comes from
Replacing the LLM with PACT’s own rule layer, over the same actions, gates and budget, still reaches +14.11%. So the structured actions and validation carry much of the result, and LLM selection adds the rest. Vivado’s post-route optimizer alone reaches +2.98%.
| Method | All 35 | Development 27 | Held-out 8 |
|---|---|---|---|
| PACTLLM selection over structured actions | +22.30% | +27.70% | +5.70% |
| ScriptedPACT’s rule layer instead of the LLM | +14.11% | +16.78% | +5.54% |
| DATunerBandit search over 47,250 flow settings, no time cap | +15.14% | +18.39% | +4.80% |
| Codex AgentSame tools and knowledge, free-form tool calls | +9.78% | +12.70% | +0.47% |
| phys_opt sweepVivado post-route optimizer alone | +2.98% | +3.53% | +1.12% |
Most of the extra gain over the scripted planner comes from the development designs. On the eight held-out designs PACT and the scripted planner are close, at +5.70% and +5.54%.
Time and cost
Mean runtime per design is 35.7 minutes for PACT, 25.4 for the Codex Agent and 267.8 for DATuner. PACT usually stops well before its one-hour cap: once no admissible candidate is left, it returns the best validated checkpoint.
With the same model and budget, every PACT run costs under $1 and every Codex run costs over $1. On BOOM SoC PACT gains 90.7% Fmax for $0.11; the Codex Agent gains 0.1% for $1.54. The difference is what the model is asked to decide. PACT asks it for the next ECO, while the Codex Agent plans every tool call itself.
Two passes on LogicNets
One repair moves the critical path, and the next repair follows it.
- 539.08 MHzWNS −0.355 ns
The critical setup path runs through LUT A.
- 541.13 MHzWNS −0.348 ns
Pass 1, lut_pin_swap: LUT A’s critical input is remapped to a faster physical pin. The critical path moves to LUT B.
- 548.85 MHzWNS −0.322 ns
Pass 2: LUT B’s logical input I2 is remapped to physical pin A3, then the design is rerouted and physically optimized before timing is measured again.
Reproduce
The artifact on GitHub (v1.0.4) contains PACT, the Vivado and RapidWright MCP servers, the DATuner and Codex reference results, and a benchmark manifest. make setup builds the pinned RapidWright and downloads the public FPL’26 contest checkpoints.
It needs Vivado 2025.1 licensed for xcvu3p-ffvc1517-2-e and an OpenAI-compatible Responses API. The scripted planner runs without a model:python -m FDAgents.agent INPUT.dcp --no-llm.
Cite
@misc{lin2026pact,
title = {PACT: Post-route Agentic Checkpoint Tuning for FPGA Timing Closure},
author = {Huan Lin and Kunlong Li and Lingli Wang and Zhiang Wang},
year = {2026},
eprint = {2608.23602},
archivePrefix = {arXiv},
primaryClass = {cs.AR},
url = {https://arxiv.org/abs/2608.23602},
note = {Accepted at FPT 2026}
}